As the demand for open-source innovation intensifies, RISC-V is redefining possibilities across the automotive, AR/VR, data centers, consumer electronics, and other industries. ACL Digital was the Silver Sponsor at the RISC-V Summit 2024, where we showcased our cutting-edge advancements and explored how we could collaborate to drive the next wave of industry transformation.
At ACL Digital, we empower businesses with transformative RISC-V solutions, harnessing the power of an open and modular Instruction Set Architecture (ISA). Our RISC-V Center of Excellence has mastered developing standard and custom extensions that enable groundbreaking innovations across sectors like AI, Automotive, Edge Computing, and HPC. Leverage ACL Digital’s Expertise in RISC-V-based SoC design development, including diverse configurations like Multi-Core, Multi-threaded, and Multi–Cluster with In– and Out–of–order capabilities to accelerate computationally intensive applications.
Highlights from the RISC-V Summit 2024
At the RISC-V Summit 2024, we exhibited our expertise in:
- RISC-V Base ISA (IMA-FDC) support.
- Vector Extension: Boosting parallelism and memory throughput with adaptive vector length.
- Hypervisor Extension: Enabling efficient hosting of guest operating systems through Virtualized Supervisor (VS) and Virtualized User (VU).
- Crypto Extension: Accelerating cryptographic workloads, including AES, GHASH, SHA-256, SHA-512, ChaCha20, SM3, and SM4 for enhanced security in IoT and embedded devices.
- Custom Extensions: Specialized operations like accelerators, or domain-specific optimizations (FFT, Trigonometry, discrete transformation, Motion based compares) tailored to your needs.
Shaping the Future of RISC-V
With proven domain-specific optimizations, accelerators, and case studies demonstrating our success in mitigating design risks, ACL Digital would be your ideal partner for RISC-V-based solutions. ACL Digital makes RISC-V more secure, faster, and smarter for diverse applications.
Recently Concluded RISC-V Webinars
- Optimizing Verification Methodology for Ensuring RISC-V Core Integrity
- Mastering the Porting of Code to RISC-V Architecture
- Navigating the RISC-V Ecosystem
- Functional Safety for the RISC-V Processor & Its Sub-system
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